The concept of spread-spectrum clocking is gaining popularity as a simple way to lower electromagnetic interference (EMI), which is becoming more severe as processor speeds increase. A system creates an EMI spike that matches its clock frequency. As processor speeds increase, the peaks can become severe enough to violate Federal Communications Commission regulations. Spread-spectrum clocking speeds up and slows down the clock within a few percent of its target frequency, thus flattening out the EMI peak by spreading it across a range of frequencies
Spread-spectrum clock generation (SSCG) is used in the design of synchronous digital systems, especially those containing microprocessors, to reduce the spectral density of the electromagnetic interference (EMI) that these systems generate. A synchronous digital system is one that is driven by a clock signal and because of its periodic nature, has an unavoidably narrow frequency spectrum. In fact, a perfect clock signal would have all its energy concentrated at a single frequency and its harmonics, and would therefore radiate energy with an infinite spectral density. Practical synchronous digital systems radiate electromagnetic energy on a number of narrow bands spread on the clock frequency and its harmonics, resulting in a frequency spectrum that, at certain frequencies, can exceed the regulatory limits for electromagnetic interference (e.g. those of the FCC in the United States, JEITA in Japan and the IEC in Europe).
The conventional Spread Spectrum Clock Generation (SSCG) module comprises a phased lock loop (PLL) and an analog signal generator to modulate the oscillating frequency by phase shifting using a VCO (voltage controlled oscillator) input. This approach is widely used, however, because this circuit is a kind of mixed signal circuit, the design usually requires special expertise.